fixed_extensions user manual

Title fixed_extensions (VHDL fixed-point arithmetic extensions package)
Author Nikolaos Kavvadias 2011, 2012, 2013, 2014
Release Date 26 September 2014
Version 0.1.1
Rev. history  


Updated README and file organization for Github. Renamed COPYING.BSD to LICENSE.



Changed documentation format to RestructuredText.



First public release.

1. Introduction

fixed_extensions_pkg is a fixed-point arithmetic package written in VHDL according to the VHDL-2008 update of the standard. It uses VHDL-2008 back- compatible libraries (by David Bishop) that are included in this distribution for the sake of completeness.

Currently, the fixed_extensions_pkg package implements the following:

round towards plus infinity.
round towards zero.
round towards minus infinity.
round to nearest; ties to greatest absolute value.
round to nearest; ties to plus infinity.
round to nearest; ties to closest even.
bit-field insertion to word
bit-field extraction from word

fixed_extensions is distributed along with a tool (gentestround) to generate customized VHDL test designs.

The fixed_extensions project can be downloaded either from the following OpenCores website:,fixed_extensions or from its corresponding Github repository:

2. File listing

The fixed_extensions distribution includes the following files:

/fixed_extensions Top-level directory
AUTHORS List of authors.
BUGS Bug list.
ChangeLog A log for code changes.
COPYING.BSD The modified BSD license.
README This file.
README.html HTML version of README.
README.pdf PDF version of README.
THANKS Acknowledgements.
TODO A list of future enhancements.
VERSION Current version of the project sources. Bash script for generating the HTML and PDF versions.
/bench/vhdl Benchmarks VHDL directory
testrounding_tb.vhd Standard testbench file.
/gen/vhdl Generated RTL VHDL code directory.
testroundings.vhd Auto-generated test file for sfixed arithmetic.
testroundingu.vhd Auto-generated test file for ufixed arithmetic.
/rtl/vhdl RTL source code directory for the package
fixed_extensions_pkg- _sim.vhd The VHDL package for simulation-oriented use.
/sim/rtl_sim RTL simulation files directory
/sim/rtl_sim/bin RTL simulation scripts directory A bash script for testing the package. Modelsim macro script for testing sfixed arithmetic. Bash script for running an sfixed simulation. Modelsim macro script for testing ufixed arithmetic. Bash script for running an ufixed simulation.
/sim/rtl_sim/src Various source files for running RTL simulations
fixed_float_typ es_custom.vhd VHDL package with definitions for fixed-point arithmetic.
fixed_pkg_c.vhd VHDL package implementing fixed-point arithmetic (VHDL'93 version of the VHDL-2008 package as found
math_real.vhd VHDL package with some real arithmetic functions (also part of the IEEE 1076 standard for VHDL).
/sw Software utilities
Makefile Makefile for compiling the test design generator.
gentestround.c Test design generator written in ANSI C.

3. fixed_extensions usage

The fixed_extensions package can be used as follows. Assuming that the user has changed directory to ./fixed_extensions, the following can be used:

$ cd sim/rtl_sim/bin
$ ./

Alternatively, the user can only generate and run some tests for solely the signed fixed-point and unsigned fixed-point data types. This is correspondingly performed as:

$ ./



4. Prerequisites